module top(
  input [8:1] SW,
  input CLK_50M,
  output [14:3] D,
  output [7:0] HEX,
  output [0:7] HEX_S
);

reg [31:0] number = 32'h00000000;
seg7x8_dp my (
	.num(number),
	.dp(8'b0),
	.CLK(CLK_50M),
	.HEX(HEX),
   .HEX_S(HEX_S)
);

reg y;
reg [31:0] i;
always @(posedge CLK_50M)
begin
	i<=i+1;
	if (i == 1_000_000) 
	begin
		y <= 1; 
		i <= 0;
	end
	else y <= 0; 
end

reg [11:0]j=12'b0000_0000_0001;
	always @(posedge y)
	begin
		j<=j<<1;
		if (j == 12'b1000_0000_0000) j <= 12'b0000_0000_0001;
		
		number <= number + 1;
	end
	
assign D[14:3] = ~j;

endmodule