You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
25 lines
1.2 KiB
25 lines
1.2 KiB
-- WARNING: Do NOT edit the input and output ports in this file in a text
|
|
-- editor if you plan to continue editing the block that represents it in
|
|
-- the Block Editor! File corruption is VERY likely to occur.
|
|
|
|
-- Copyright (C) 2020 Intel Corporation. All rights reserved.
|
|
-- Your use of Intel Corporation's design tools, logic functions
|
|
-- and other software and tools, and any partner logic
|
|
-- functions, and any output files from any of the foregoing
|
|
-- (including device programming or simulation files), and any
|
|
-- associated documentation or information are expressly subject
|
|
-- to the terms and conditions of the Intel Program License
|
|
-- Subscription Agreement, the Intel Quartus Prime License Agreement,
|
|
-- the Intel FPGA IP License Agreement, or other applicable license
|
|
-- agreement, including, without limitation, that your use is for
|
|
-- the sole purpose of programming logic devices manufactured by
|
|
-- Intel and sold by Intel or its authorized distributors. Please
|
|
-- refer to the applicable agreement for further details, at
|
|
-- https://fpgasoftware.intel.com/eula.
|
|
|
|
|
|
-- Generated by Quartus Prime Version 20.1 (Build Build 720 11/11/2020)
|
|
-- Created on Sat Apr 24 03:39:58 2021
|
|
|
|
FUNCTION 7seg_driver (D[3..0])
|
|
RETURNS (SEG[6..0]);
|
|
|